The present invention relates to improvements in decimal, parallel adders and more particularly, the invention relates to such adders wherein each decimal position has an input adding stage, a main adding stage and a correcting stage behind the main adding stage.
Parallel adders are used generally for decimal (bcd) or straight forward binary addition or substraction wherein digits in corresponding positions are processed in parallel rather than serially. The main purpose of a parallel adder is saving of time as compared with serial adders. Of course, parallel adders are quite expensive so that their use has been limited e.g., to high speed computers.
THe development of integrated circuits has reduced the cost for hardware to such an extent that the more involved circuitry of a parallel adder adds only little to the cost of any device in which the adder is to be incorporated. As a consequence, parallel adders are not being used more frequenty. A typical parallel adder is described, for example, in "Control Engineering", Oct. 1972 issue, pages 48, 49. This adder has two input adding stages and one main adding stage and a correcting stage, for each decimal position. As shown in FIG. 2 of that publication, a complement forming stage is provided for each input digit so that the adder can provide for substraction as well.
This particular adder, though rather involved, is still not capable of some important arithmetic operations. For example, such an adder cannot substract numbers having in their higher decimal positions zeros. This is a significant drawback as it is frequently desirable to fill all positions with numbers, whereby leading zeros are used in the higher nonparticuipating positions for the numbers. Rarely are adders used to capacity of its format, and the highest significant digit of any number quite frequently does not occupy the highest available position. Also, a subtraction of a larger number from a smaller one is not possible, but will result in the respective ten complement. Still furthermore, one cannot add negative numbers. In other words, these last mentioned operations, if needed, (and they always are) must be provided for by still additional circuitry. These drawbacks are, therefore, quite significant.